/*
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
*
* SPDX-License-Identifier: BSD-3-Clause
*/

/**********************************************************************************************************************
 * File Name    : dma_iobitmask.h
 * Version      : 1.00
 * Description  : IO bit mask file for dma.
 *********************************************************************************************************************/

#ifndef DMA_IOBITMASK_H
#define DMA_IOBITMASK_H

#define R_DMA_DCTRL_PR_Msk            (0x00000001UL)
#define R_DMA_DCTRL_PR_Pos            (0UL)
#define R_DMA_DCTRL_LVINT_Msk         (0x00000002UL)
#define R_DMA_DCTRL_LVINT_Pos         (1UL)
#define R_DMA_DCTRL_LDPR_Msk          (0x00070000UL)
#define R_DMA_DCTRL_LDPR_Pos          (16UL)
#define R_DMA_DCTRL_LDCA_Msk          (0x00F00000UL)
#define R_DMA_DCTRL_LDCA_Pos          (20UL)
#define R_DMA_DCTRL_LWPR_Msk          (0x07000000UL)
#define R_DMA_DCTRL_LWPR_Pos          (24UL)
#define R_DMA_DCTRL_LWCA_Msk          (0xF0000000UL)
#define R_DMA_DCTRL_LWCA_Pos          (28UL)
#define R_DMA_DSTAT_EN_EN0_Msk        (0x00000001UL)
#define R_DMA_DSTAT_EN_EN0_Pos        (0UL)
#define R_DMA_DSTAT_EN_EN1_Msk        (0x00000002UL)
#define R_DMA_DSTAT_EN_EN1_Pos        (1UL)
#define R_DMA_DSTAT_EN_EN2_Msk        (0x00000004UL)
#define R_DMA_DSTAT_EN_EN2_Pos        (2UL)
#define R_DMA_DSTAT_EN_EN3_Msk        (0x00000008UL)
#define R_DMA_DSTAT_EN_EN3_Pos        (3UL)
#define R_DMA_DSTAT_EN_EN4_Msk        (0x00000010UL)
#define R_DMA_DSTAT_EN_EN4_Pos        (4UL)
#define R_DMA_DSTAT_EN_EN5_Msk        (0x00000020UL)
#define R_DMA_DSTAT_EN_EN5_Pos        (5UL)
#define R_DMA_DSTAT_EN_EN6_Msk        (0x00000040UL)
#define R_DMA_DSTAT_EN_EN6_Pos        (6UL)
#define R_DMA_DSTAT_EN_EN7_Msk        (0x00000080UL)
#define R_DMA_DSTAT_EN_EN7_Pos        (7UL)
#define R_DMA_DSTAT_ER_ER0_Msk        (0x00000001UL)
#define R_DMA_DSTAT_ER_ER0_Pos        (0UL)
#define R_DMA_DSTAT_ER_ER1_Msk        (0x00000002UL)
#define R_DMA_DSTAT_ER_ER1_Pos        (1UL)
#define R_DMA_DSTAT_ER_ER2_Msk        (0x00000004UL)
#define R_DMA_DSTAT_ER_ER2_Pos        (2UL)
#define R_DMA_DSTAT_ER_ER3_Msk        (0x00000008UL)
#define R_DMA_DSTAT_ER_ER3_Pos        (3UL)
#define R_DMA_DSTAT_ER_ER4_Msk        (0x00000010UL)
#define R_DMA_DSTAT_ER_ER4_Pos        (4UL)
#define R_DMA_DSTAT_ER_ER5_Msk        (0x00000020UL)
#define R_DMA_DSTAT_ER_ER5_Pos        (5UL)
#define R_DMA_DSTAT_ER_ER6_Msk        (0x00000040UL)
#define R_DMA_DSTAT_ER_ER6_Pos        (6UL)
#define R_DMA_DSTAT_ER_ER7_Msk        (0x00000080UL)
#define R_DMA_DSTAT_ER_ER7_Pos        (7UL)
#define R_DMA_DSTAT_END_END0_Msk      (0x00000001UL)
#define R_DMA_DSTAT_END_END0_Pos      (0UL)
#define R_DMA_DSTAT_END_END1_Msk      (0x00000002UL)
#define R_DMA_DSTAT_END_END1_Pos      (1UL)
#define R_DMA_DSTAT_END_END2_Msk      (0x00000004UL)
#define R_DMA_DSTAT_END_END2_Pos      (2UL)
#define R_DMA_DSTAT_END_END3_Msk      (0x00000008UL)
#define R_DMA_DSTAT_END_END3_Pos      (3UL)
#define R_DMA_DSTAT_END_END4_Msk      (0x00000010UL)
#define R_DMA_DSTAT_END_END4_Pos      (4UL)
#define R_DMA_DSTAT_END_END5_Msk      (0x00000020UL)
#define R_DMA_DSTAT_END_END5_Pos      (5UL)
#define R_DMA_DSTAT_END_END6_Msk      (0x00000040UL)
#define R_DMA_DSTAT_END_END6_Pos      (6UL)
#define R_DMA_DSTAT_END_END7_Msk      (0x00000080UL)
#define R_DMA_DSTAT_END_END7_Pos      (7UL)
#define R_DMA_DSTAT_TC_TC0_Msk        (0x00000001UL)
#define R_DMA_DSTAT_TC_TC0_Pos        (0UL)
#define R_DMA_DSTAT_TC_TC1_Msk        (0x00000002UL)
#define R_DMA_DSTAT_TC_TC1_Pos        (1UL)
#define R_DMA_DSTAT_TC_TC2_Msk        (0x00000004UL)
#define R_DMA_DSTAT_TC_TC2_Pos        (2UL)
#define R_DMA_DSTAT_TC_TC3_Msk        (0x00000008UL)
#define R_DMA_DSTAT_TC_TC3_Pos        (3UL)
#define R_DMA_DSTAT_TC_TC4_Msk        (0x00000010UL)
#define R_DMA_DSTAT_TC_TC4_Pos        (4UL)
#define R_DMA_DSTAT_TC_TC5_Msk        (0x00000020UL)
#define R_DMA_DSTAT_TC_TC5_Pos        (5UL)
#define R_DMA_DSTAT_TC_TC6_Msk        (0x00000040UL)
#define R_DMA_DSTAT_TC_TC6_Pos        (6UL)
#define R_DMA_DSTAT_TC_TC7_Msk        (0x00000080UL)
#define R_DMA_DSTAT_TC_TC7_Pos        (7UL)
#define R_DMA_DSTAT_SUS_SUS0_Msk      (0x00000001UL)
#define R_DMA_DSTAT_SUS_SUS0_Pos      (0UL)
#define R_DMA_DSTAT_SUS_SUS1_Msk      (0x00000002UL)
#define R_DMA_DSTAT_SUS_SUS1_Pos      (1UL)
#define R_DMA_DSTAT_SUS_SUS2_Msk      (0x00000004UL)
#define R_DMA_DSTAT_SUS_SUS2_Pos      (2UL)
#define R_DMA_DSTAT_SUS_SUS3_Msk      (0x00000008UL)
#define R_DMA_DSTAT_SUS_SUS3_Pos      (3UL)
#define R_DMA_DSTAT_SUS_SUS4_Msk      (0x00000010UL)
#define R_DMA_DSTAT_SUS_SUS4_Pos      (4UL)
#define R_DMA_DSTAT_SUS_SUS5_Msk      (0x00000020UL)
#define R_DMA_DSTAT_SUS_SUS5_Pos      (5UL)
#define R_DMA_DSTAT_SUS_SUS6_Msk      (0x00000040UL)
#define R_DMA_DSTAT_SUS_SUS6_Pos      (6UL)
#define R_DMA_DSTAT_SUS_SUS7_Msk      (0x00000080UL)
#define R_DMA_DSTAT_SUS_SUS7_Pos      (7UL)
#define R_DMA_N0SA_SA_Msk             (0xFFFFFFFFUL)
#define R_DMA_N0SA_SA_Pos             (0UL)
#define R_DMA_N0DA_DA_Msk             (0xFFFFFFFFUL)
#define R_DMA_N0DA_DA_Pos             (0UL)
#define R_DMA_N0TB_TB_Msk             (0xFFFFFFFFUL)
#define R_DMA_N0TB_TB_Pos             (0UL)
#define R_DMA_N1SA_SA_Msk             (0xFFFFFFFFUL)
#define R_DMA_N1SA_SA_Pos             (0UL)
#define R_DMA_N1DA_DA_Msk             (0xFFFFFFFFUL)
#define R_DMA_N1DA_DA_Pos             (0UL)
#define R_DMA_N1TB_TB_Msk             (0xFFFFFFFFUL)
#define R_DMA_N1TB_TB_Pos             (0UL)
#define R_DMA_CRSA_CRSA_Msk           (0xFFFFFFFFUL)
#define R_DMA_CRSA_CRSA_Pos           (0UL)
#define R_DMA_CRDA_CRDA_Msk           (0xFFFFFFFFUL)
#define R_DMA_CRDA_CRDA_Pos           (0UL)
#define R_DMA_CRTB_CRTB_Msk           (0xFFFFFFFFUL)
#define R_DMA_CRTB_CRTB_Pos           (0UL)
#define R_DMA_CHSTAT_EN_Msk           (0x00000001UL)
#define R_DMA_CHSTAT_EN_Pos           (0UL)
#define R_DMA_CHSTAT_RQST_Msk         (0x00000002UL)
#define R_DMA_CHSTAT_RQST_Pos         (1UL)
#define R_DMA_CHSTAT_TACT_Msk         (0x00000004UL)
#define R_DMA_CHSTAT_TACT_Pos         (2UL)
#define R_DMA_CHSTAT_SUS_Msk          (0x00000008UL)
#define R_DMA_CHSTAT_SUS_Pos          (3UL)
#define R_DMA_CHSTAT_ER_Msk           (0x00000010UL)
#define R_DMA_CHSTAT_ER_Pos           (4UL)
#define R_DMA_CHSTAT_END_Msk          (0x00000020UL)
#define R_DMA_CHSTAT_END_Pos          (5UL)
#define R_DMA_CHSTAT_TC_Msk           (0x00000040UL)
#define R_DMA_CHSTAT_TC_Pos           (6UL)
#define R_DMA_CHSTAT_SR_Msk           (0x00000080UL)
#define R_DMA_CHSTAT_SR_Pos           (7UL)
#define R_DMA_CHSTAT_DL_Msk           (0x00000100UL)
#define R_DMA_CHSTAT_DL_Pos           (8UL)
#define R_DMA_CHSTAT_DW_Msk           (0x00000200UL)
#define R_DMA_CHSTAT_DW_Pos           (9UL)
#define R_DMA_CHSTAT_DER_Msk          (0x00000400UL)
#define R_DMA_CHSTAT_DER_Pos          (10UL)
#define R_DMA_CHSTAT_MODE_Msk         (0x00000800UL)
#define R_DMA_CHSTAT_MODE_Pos         (11UL)
#define R_DMA_CHSTAT_INTMSK_Msk       (0x00010000UL)
#define R_DMA_CHSTAT_INTMSK_Pos       (16UL)
#define R_DMA_CHCTRL_SETEN_Msk        (0x00000001UL)
#define R_DMA_CHCTRL_SETEN_Pos        (0UL)
#define R_DMA_CHCTRL_CLREN_Msk        (0x00000002UL)
#define R_DMA_CHCTRL_CLREN_Pos        (1UL)
#define R_DMA_CHCTRL_STG_Msk          (0x00000004UL)
#define R_DMA_CHCTRL_STG_Pos          (2UL)
#define R_DMA_CHCTRL_SWRST_Msk        (0x00000008UL)
#define R_DMA_CHCTRL_SWRST_Pos        (3UL)
#define R_DMA_CHCTRL_CLRRQ_Msk        (0x00000010UL)
#define R_DMA_CHCTRL_CLRRQ_Pos        (4UL)
#define R_DMA_CHCTRL_CLREND_Msk       (0x00000020UL)
#define R_DMA_CHCTRL_CLREND_Pos       (5UL)
#define R_DMA_CHCTRL_CLRTC_Msk        (0x00000040UL)
#define R_DMA_CHCTRL_CLRTC_Pos        (6UL)
#define R_DMA_CHCTRL_SETSUS_Msk       (0x00000100UL)
#define R_DMA_CHCTRL_SETSUS_Pos       (8UL)
#define R_DMA_CHCTRL_CLRSUS_Msk       (0x00000200UL)
#define R_DMA_CHCTRL_CLRSUS_Pos       (9UL)
#define R_DMA_CHCTRL_SETINTMSK_Msk    (0x00010000UL)
#define R_DMA_CHCTRL_SETINTMSK_Pos    (16UL)
#define R_DMA_CHCTRL_CLRINTMSK_Msk    (0x00020000UL)
#define R_DMA_CHCTRL_CLRINTMSK_Pos    (17UL)
#define R_DMA_CHCFG_SEL_Msk           (0x00000007UL)
#define R_DMA_CHCFG_SEL_Pos           (0UL)
#define R_DMA_CHCFG_REQD_Msk          (0x00000008UL)
#define R_DMA_CHCFG_REQD_Pos          (3UL)
#define R_DMA_CHCFG_LOEN_Msk          (0x00000010UL)
#define R_DMA_CHCFG_LOEN_Pos          (4UL)
#define R_DMA_CHCFG_HIEN_Msk          (0x00000020UL)
#define R_DMA_CHCFG_HIEN_Pos          (5UL)
#define R_DMA_CHCFG_LVL_Msk           (0x00000040UL)
#define R_DMA_CHCFG_LVL_Pos           (6UL)
#define R_DMA_CHCFG_AM_Msk            (0x00000700UL)
#define R_DMA_CHCFG_AM_Pos            (8UL)
#define R_DMA_CHCFG_SDS_Msk           (0x0000F000UL)
#define R_DMA_CHCFG_SDS_Pos           (12UL)
#define R_DMA_CHCFG_DDS_Msk           (0x000F0000UL)
#define R_DMA_CHCFG_DDS_Pos           (16UL)
#define R_DMA_CHCFG_SAD_Msk           (0x00100000UL)
#define R_DMA_CHCFG_SAD_Pos           (20UL)
#define R_DMA_CHCFG_DAD_Msk           (0x00200000UL)
#define R_DMA_CHCFG_DAD_Pos           (21UL)
#define R_DMA_CHCFG_TM_Msk            (0x00400000UL)
#define R_DMA_CHCFG_TM_Pos            (22UL)
#define R_DMA_CHCFG_DEM_Msk           (0x01000000UL)
#define R_DMA_CHCFG_DEM_Pos           (24UL)
#define R_DMA_CHCFG_SBE_Msk           (0x08000000UL)
#define R_DMA_CHCFG_SBE_Pos           (27UL)
#define R_DMA_CHCFG_RSEL_Msk          (0x10000000UL)
#define R_DMA_CHCFG_RSEL_Pos          (28UL)
#define R_DMA_CHCFG_RSW_Msk           (0x20000000UL)
#define R_DMA_CHCFG_RSW_Pos           (29UL)
#define R_DMA_CHCFG_REN_Msk           (0x40000000UL)
#define R_DMA_CHCFG_REN_Pos           (30UL)
#define R_DMA_CHCFG_DMS_Msk           (0x80000000UL)
#define R_DMA_CHCFG_DMS_Pos           (31UL)
#define R_DMA_CHITVL_ITVL_Msk         (0x0000FFFFUL)
#define R_DMA_CHITVL_ITVL_Pos         (0UL)
#define R_DMA_CHEXT_SPR_Msk           (0x00000007UL)
#define R_DMA_CHEXT_SPR_Pos           (0UL)
#define R_DMA_CHEXT_SCA_Msk           (0x000000F0UL)
#define R_DMA_CHEXT_SCA_Pos           (4UL)
#define R_DMA_CHEXT_DPR_Msk           (0x00000700UL)
#define R_DMA_CHEXT_DPR_Pos           (8UL)
#define R_DMA_CHEXT_DCA_Msk           (0x0000F000UL)
#define R_DMA_CHEXT_DCA_Pos           (12UL)
#define R_DMA_NXLA_NXLA_Msk           (0xFFFFFFFFUL)
#define R_DMA_NXLA_NXLA_Pos           (0UL)
#define R_DMA_CRLA_CRLA_Msk           (0xFFFFFFFFUL)
#define R_DMA_CRLA_CRLA_Pos           (0UL)
#define R_DMA_DSTAT_EN_EN8_Msk        (0x00000001UL)
#define R_DMA_DSTAT_EN_EN8_Pos        (0UL)
#define R_DMA_DSTAT_EN_EN9_Msk        (0x00000002UL)
#define R_DMA_DSTAT_EN_EN9_Pos        (1UL)
#define R_DMA_DSTAT_EN_EN10_Msk       (0x00000004UL)
#define R_DMA_DSTAT_EN_EN10_Pos       (2UL)
#define R_DMA_DSTAT_EN_EN11_Msk       (0x00000008UL)
#define R_DMA_DSTAT_EN_EN11_Pos       (3UL)
#define R_DMA_DSTAT_EN_EN12_Msk       (0x00000010UL)
#define R_DMA_DSTAT_EN_EN12_Pos       (4UL)
#define R_DMA_DSTAT_EN_EN13_Msk       (0x00000020UL)
#define R_DMA_DSTAT_EN_EN13_Pos       (5UL)
#define R_DMA_DSTAT_EN_EN14_Msk       (0x00000040UL)
#define R_DMA_DSTAT_EN_EN14_Pos       (6UL)
#define R_DMA_DSTAT_EN_EN15_Msk       (0x00000080UL)
#define R_DMA_DSTAT_EN_EN15_Pos       (7UL)
#define R_DMA_DSTAT_ER_ER8_Msk        (0x00000001UL)
#define R_DMA_DSTAT_ER_ER8_Pos        (0UL)
#define R_DMA_DSTAT_ER_ER9_Msk        (0x00000002UL)
#define R_DMA_DSTAT_ER_ER9_Pos        (1UL)
#define R_DMA_DSTAT_ER_ER10_Msk       (0x00000004UL)
#define R_DMA_DSTAT_ER_ER10_Pos       (2UL)
#define R_DMA_DSTAT_ER_ER11_Msk       (0x00000008UL)
#define R_DMA_DSTAT_ER_ER11_Pos       (3UL)
#define R_DMA_DSTAT_ER_ER12_Msk       (0x00000010UL)
#define R_DMA_DSTAT_ER_ER12_Pos       (4UL)
#define R_DMA_DSTAT_ER_ER13_Msk       (0x00000020UL)
#define R_DMA_DSTAT_ER_ER13_Pos       (5UL)
#define R_DMA_DSTAT_ER_ER14_Msk       (0x00000040UL)
#define R_DMA_DSTAT_ER_ER14_Pos       (6UL)
#define R_DMA_DSTAT_ER_ER15_Msk       (0x00000080UL)
#define R_DMA_DSTAT_ER_ER15_Pos       (7UL)
#define R_DMA_DSTAT_END_END8_Msk      (0x00000001UL)
#define R_DMA_DSTAT_END_END8_Pos      (0UL)
#define R_DMA_DSTAT_END_END9_Msk      (0x00000002UL)
#define R_DMA_DSTAT_END_END9_Pos      (1UL)
#define R_DMA_DSTAT_END_END10_Msk     (0x00000004UL)
#define R_DMA_DSTAT_END_END10_Pos     (2UL)
#define R_DMA_DSTAT_END_END11_Msk     (0x00000008UL)
#define R_DMA_DSTAT_END_END11_Pos     (3UL)
#define R_DMA_DSTAT_END_END12_Msk     (0x00000010UL)
#define R_DMA_DSTAT_END_END12_Pos     (4UL)
#define R_DMA_DSTAT_END_END13_Msk     (0x00000020UL)
#define R_DMA_DSTAT_END_END13_Pos     (5UL)
#define R_DMA_DSTAT_END_END14_Msk     (0x00000040UL)
#define R_DMA_DSTAT_END_END14_Pos     (6UL)
#define R_DMA_DSTAT_END_END15_Msk     (0x00000080UL)
#define R_DMA_DSTAT_END_END15_Pos     (7UL)
#define R_DMA_DSTAT_TC_TC8_Msk        (0x00000001UL)
#define R_DMA_DSTAT_TC_TC8_Pos        (0UL)
#define R_DMA_DSTAT_TC_TC9_Msk        (0x00000002UL)
#define R_DMA_DSTAT_TC_TC9_Pos        (1UL)
#define R_DMA_DSTAT_TC_TC10_Msk       (0x00000004UL)
#define R_DMA_DSTAT_TC_TC10_Pos       (2UL)
#define R_DMA_DSTAT_TC_TC11_Msk       (0x00000008UL)
#define R_DMA_DSTAT_TC_TC11_Pos       (3UL)
#define R_DMA_DSTAT_TC_TC12_Msk       (0x00000010UL)
#define R_DMA_DSTAT_TC_TC12_Pos       (4UL)
#define R_DMA_DSTAT_TC_TC13_Msk       (0x00000020UL)
#define R_DMA_DSTAT_TC_TC13_Pos       (5UL)
#define R_DMA_DSTAT_TC_TC14_Msk       (0x00000040UL)
#define R_DMA_DSTAT_TC_TC14_Pos       (6UL)
#define R_DMA_DSTAT_TC_TC15_Msk       (0x00000080UL)
#define R_DMA_DSTAT_TC_TC15_Pos       (7UL)
#define R_DMA_DSTAT_SUS_SUS8_Msk      (0x00000001UL)
#define R_DMA_DSTAT_SUS_SUS8_Pos      (0UL)
#define R_DMA_DSTAT_SUS_SUS9_Msk      (0x00000002UL)
#define R_DMA_DSTAT_SUS_SUS9_Pos      (1UL)
#define R_DMA_DSTAT_SUS_SUS10_Msk     (0x00000004UL)
#define R_DMA_DSTAT_SUS_SUS10_Pos     (2UL)
#define R_DMA_DSTAT_SUS_SUS11_Msk     (0x00000008UL)
#define R_DMA_DSTAT_SUS_SUS11_Pos     (3UL)
#define R_DMA_DSTAT_SUS_SUS12_Msk     (0x00000010UL)
#define R_DMA_DSTAT_SUS_SUS12_Pos     (4UL)
#define R_DMA_DSTAT_SUS_SUS13_Msk     (0x00000020UL)
#define R_DMA_DSTAT_SUS_SUS13_Pos     (5UL)
#define R_DMA_DSTAT_SUS_SUS14_Msk     (0x00000040UL)
#define R_DMA_DSTAT_SUS_SUS14_Pos     (6UL)
#define R_DMA_DSTAT_SUS_SUS15_Msk     (0x00000080UL)
#define R_DMA_DSTAT_SUS_SUS15_Pos     (7UL)
#define R_DMA_DMARS0_CH0_RID_Msk      (0x00000003UL)
#define R_DMA_DMARS0_CH0_RID_Pos      (0UL)
#define R_DMA_DMARS0_CH0_MID_Msk      (0x000003FCUL)
#define R_DMA_DMARS0_CH0_MID_Pos      (2UL)
#define R_DMA_DMARS0_CH1_RID_Msk      (0x00030000UL)
#define R_DMA_DMARS0_CH1_RID_Pos      (16UL)
#define R_DMA_DMARS0_CH1_MID_Msk      (0x03FC0000UL)
#define R_DMA_DMARS0_CH1_MID_Pos      (18UL)
#define R_DMA_DMARS1_CH2_RID_Msk      (0x00000003UL)
#define R_DMA_DMARS1_CH2_RID_Pos      (0UL)
#define R_DMA_DMARS1_CH2_MID_Msk      (0x000003FCUL)
#define R_DMA_DMARS1_CH2_MID_Pos      (2UL)
#define R_DMA_DMARS1_CH3_RID_Msk      (0x00030000UL)
#define R_DMA_DMARS1_CH3_RID_Pos      (16UL)
#define R_DMA_DMARS1_CH3_MID_Msk      (0x03FC0000UL)
#define R_DMA_DMARS1_CH3_MID_Pos      (18UL)
#define R_DMA_DMARS2_CH4_RID_Msk      (0x00000003UL)
#define R_DMA_DMARS2_CH4_RID_Pos      (0UL)
#define R_DMA_DMARS2_CH4_MID_Msk      (0x000003FCUL)
#define R_DMA_DMARS2_CH4_MID_Pos      (2UL)
#define R_DMA_DMARS2_CH5_RID_Msk      (0x00030000UL)
#define R_DMA_DMARS2_CH5_RID_Pos      (16UL)
#define R_DMA_DMARS2_CH5_MID_Msk      (0x03FC0000UL)
#define R_DMA_DMARS2_CH5_MID_Pos      (18UL)
#define R_DMA_DMARS3_CH6_RID_Msk      (0x00000003UL)
#define R_DMA_DMARS3_CH6_RID_Pos      (0UL)
#define R_DMA_DMARS3_CH6_MID_Msk      (0x000003FCUL)
#define R_DMA_DMARS3_CH6_MID_Pos      (2UL)
#define R_DMA_DMARS3_CH7_RID_Msk      (0x00030000UL)
#define R_DMA_DMARS3_CH7_RID_Pos      (16UL)
#define R_DMA_DMARS3_CH7_MID_Msk      (0x03FC0000UL)
#define R_DMA_DMARS3_CH7_MID_Pos      (18UL)
#define R_DMA_DMARS4_CH8_RID_Msk      (0x00000003UL)
#define R_DMA_DMARS4_CH8_RID_Pos      (0UL)
#define R_DMA_DMARS4_CH8_MID_Msk      (0x000003FCUL)
#define R_DMA_DMARS4_CH8_MID_Pos      (2UL)
#define R_DMA_DMARS4_CH9_RID_Msk      (0x00030000UL)
#define R_DMA_DMARS4_CH9_RID_Pos      (16UL)
#define R_DMA_DMARS4_CH9_MID_Msk      (0x03FC0000UL)
#define R_DMA_DMARS4_CH9_MID_Pos      (18UL)
#define R_DMA_DMARS5_CH10_RID_Msk     (0x00000003UL)
#define R_DMA_DMARS5_CH10_RID_Pos     (0UL)
#define R_DMA_DMARS5_CH10_MID_Msk     (0x000003FCUL)
#define R_DMA_DMARS5_CH10_MID_Pos     (2UL)
#define R_DMA_DMARS5_CH11_RID_Msk     (0x00030000UL)
#define R_DMA_DMARS5_CH11_RID_Pos     (16UL)
#define R_DMA_DMARS5_CH11_MID_Msk     (0x03FC0000UL)
#define R_DMA_DMARS5_CH11_MID_Pos     (18UL)
#define R_DMA_DMARS6_CH12_RID_Msk     (0x00000003UL)
#define R_DMA_DMARS6_CH12_RID_Pos     (0UL)
#define R_DMA_DMARS6_CH12_MID_Msk     (0x000003FCUL)
#define R_DMA_DMARS6_CH12_MID_Pos     (2UL)
#define R_DMA_DMARS6_CH13_RID_Msk     (0x00030000UL)
#define R_DMA_DMARS6_CH13_RID_Pos     (16UL)
#define R_DMA_DMARS6_CH13_MID_Msk     (0x03FC0000UL)
#define R_DMA_DMARS6_CH13_MID_Pos     (18UL)
#define R_DMA_DMARS7_CH14_RID_Msk     (0x00000003UL)
#define R_DMA_DMARS7_CH14_RID_Pos     (0UL)
#define R_DMA_DMARS7_CH14_MID_Msk     (0x000003FCUL)
#define R_DMA_DMARS7_CH14_MID_Pos     (2UL)
#define R_DMA_DMARS7_CH15_RID_Msk     (0x00030000UL)
#define R_DMA_DMARS7_CH15_RID_Pos     (16UL)
#define R_DMA_DMARS7_CH15_MID_Msk     (0x03FC0000UL)
#define R_DMA_DMARS7_CH15_MID_Pos     (18UL)

#endif
